SV1C-12 Personalized SerDes Tester

SerDes tester for clock forwarded and embedded clock applications up to 12.5 Gbps

BENEFITS

Continuous data rate selection up to 12.5 Gbps

True parallel bit-error-rate measurement across 8 lanes

Per lane TX amplitude and pre-emphasis control

Per lane RX clock recovery and equalization

TX jitter injection and integrated RX jitter testing

BERT, eye diagram and analog waveform measurement capabilities

Flexible loopback support

State-of-the-art programming environment based on the highly intuitive Python language

SV1C-12個(gè)性化SerDes測(cè)試儀

SerDes測(cè)試儀，適用于高達(dá)12.5 Gbps的時(shí)鐘轉(zhuǎn)發(fā)和嵌入式時(shí)鐘應(yīng)用

利益

連續(xù)數(shù)據(jù)速率選擇高達(dá)12.5 Gbps

跨8個(gè)通道的真正并行誤碼率測(cè)量

每通道TX幅度和預(yù)加重控制

每通道接收機(jī)時(shí)鐘恢復(fù)和均衡

TX抖動(dòng)注入和集成RX抖動(dòng)測(cè)試

BERT，眼圖和模擬波形測(cè)量能力

靈活的環(huán)回支持

基于高度直觀的Python語言的進(jìn)的編程環(huán)境